This invention relates, in general, to electronics, and more particularly, to electronic components and methods of manufacture.
In the manufacturing of micro-machined structures, a sacrificial layer located underneath a patterned electrode must be removed. If the etch process used to remove the sacrificial layer is too short, an insufficient amount of the sacrificial layer is removed, and the overlying electrode is not released and is not movable. However, if the etch process used to remove the sacrificial layer is too long, other layers or features of the micro-machined structure are eroded.
One technique for evaluating the etch process for the sacrificial layer involves a manual, visual inspection using visible or infrared light. Another technique for evaluating the sacrificial layer etch process involves a manual, destructive test using a probe needle or adhesive tape to remove the released electrode. However, these techniques are costly and are difficult to automate. Furthermore, these manual techniques are not compatible with existing Statistical Process Control (SPC) methods.
Accordingly, a need exists for an electronic component and method of manufacturing having test structures capable of characterizing the etch process for the sacrificial layer. The measurement or evaluation of such test structures should be easily automated such that the characterization of the etch process for the sacrificial layer is compatible with existing SPC methods using electrical probe data.